The D Flip-Flop (Quickstart Tutorial) (2024)

The D Flip-Flop is an edge-triggered circuit that combines a pair of D latches to store one bit. It is commonly used as a basic building block in digital electronics to create counters or memory blocks such as shift registers.

In this tutorial, you will learn how it works, its truth table, and how to build one with logic gates.

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What is a Flip-Flop?

Latches and flip-flops are sometimes grouped together since they both can store one bit (1 or 0) on their outputs. In contrast to latches, flip-flops are synchronous circuits that need a clock signal (Clk). The D Flip-Flop will only store a new value from the D input when the clock goes from 0 to 1 (rising edge) or 1 to 0 (falling edge).

A D Flip-Flop is built from two D latches. You can see a D Flip-Flop that updates on the rising edge below:

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The timing diagram for this circuit is shown below. It shows how a rising edge-triggered D Flip-Flop behaves. The output Q only changes to the value the D input has at the moment the clock goes from 0 to 1.

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How Does the D Flip-Flop Work?

Since the output Q only changes when the Clock input goes from 0 to 1, you’ll get the following truth table:

ClkDQDescription
0XQMemory
(no change)
0→1 (↑)00Reset Q to 0
0→1 (↑)11Set Q to 1
1XQMemory
(no change)

In the first and last rows of the truth table, the clock input is 0 and 1. None of them is a rising edge signal, so nothing happens. The Q output keeps whatever value it had. In this case, no matter what value the D input has, the Q output won’t change, it will keep its value as it is. This is how this circuit “remembers” a bit.

Have a look at the two middle rows. Here the clock input is going from 0 to 1, so you have a rising edge. This means that if the D input is 0, the Q output will be reset to 0. If the D input is 1, the Q output will be set to 1.

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Presetting

D Flip-Flops that you find in chips ready for use, such as the CD4013, usually also have Set and Reset inputs that you can use to force the D flip-flop into starting with a 1 or a 0 on the output. Using these pins is sometimes referred to as “presetting” the D flip-flop.

The Advantage of a D Flip-Flop vs Latch

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One of the downsides of the D latch is that its output can change at any time while its Enable pin is 1. So if you apply a clock signal to the D Latch, the Q output could also change during the time the positive pulse lasts.

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In the timing diagram above, you can see that during one clock cycle, the output is both 1 and 0 because the D input changes during the clock pulse. That’s something you don’t want to happen in a clocked digital system.

To get this flip-flop to change its output only on the rising edges of the clock signal you can build a Master-Slave D Flip-Flop Circuit, which requires a combination of two D latches as follows:

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How D Flip-Flops Work

The output from the master latch changes to what the D input has when the Clk input is 0.

If Clk is 0, it means that the Enable input of the slave latch is also 0. So nothing happens with the output of this latch.

But at the moment that Clk goes from 0 to 1 (rising edge), the Enable input of the slave latch is set to 1. That means whatever was on the output of the master latch at the moment Clk went from 0 to 1 is saved to the output of the slave latch.

If you substitute the symbols for D latches built with NAND gates you’ll get:

The D Flip-Flop (Quickstart Tutorial) (8)

What Can You Use Them For?

The D Flip-flop is a very useful circuit. You can combine several D flip-flops to create for example shift registers and counters, which are used a lot in digital electronics. But you don’t have to build them from scratch. Instead, you can use the CD4013 chip that contains two D flip-flops.

Circuit Example: Shift Registers

To create a shift register, connect the output of one flip-flop to the input of the next. New bits go into the first flip-flop on the left. And for every clock pulse, the bits stored in the other flip-flops are shifted one place to the right.

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This is useful for example to get more output pins from an Arduino or other microcontroller. To control a shift register, you need one data pin and one clock pin. So with only two pins from the Arduino, you can control as many external pins as you want by using a shift register.

Circuit Example: Ring Counters

If you take the output from the last flip-flop in a shift register and connect it to the input of the first flip-flop, you get aRing Counter. Preset one of the flip-flops to start with 1, then this 1 will be shifted around and around in the Ring Counter.

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TheIC 4017is a chip with this type of functionality, but with 10 outputs instead of just 4 like above. This makes for a fun chip you can use for example to create the Knight Rider LED bar.

Questions?

Do you have any questions about how the D Flip-Flop works? Let me know in the comments below.

More Digital Electronics Tutorials

  • The Binary Number System
  • Logic Gates: AND, OR, NOT, NAND, NOR, XOR, XNOR
  • The S-R Latch
  • The D Latch
  • The D Flip-Flop
  • The JK Flip-Flop
  • The T Flip-Flop
  • The Shift Register
  • Binary Adders: The Half Adder
  • Binary Adders: The Full Adder
  • How To Use Open Collector Outputs
  • 4000 Series IC Tutorials
  • 7400 Series IC Tutorials

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10 Simple Steps to Learn Electronics

Electronics is easy when you know what to focus on and what to ignore. Learn what "the basics" really is and how to learn it fast.

The D Flip-Flop (Quickstart Tutorial) (2024)

FAQs

What is the D flip-flop in short note? ›

The D flip flop has two inputs, data and clock input which controls the flip flop. when clock input is high, the data is transferred to the output of the flip flop and when the clock input is low, the output of the flip flop is held in its previous state.

What is the equation for the D flip-flop? ›

The characteristic table for the D flip–flop is so simple that it is expressed better as the equation Q(t + 1) = D. Here is the table. The excitation equation for a D flip–flop is quite simple: D = Q(t + 1).

How to make d flip-flop using d latch? ›

A D flip-flop can be made by connecting two D latches in series, with inverted clock signals (as shown in Fig 5). The first latch is called the master, and the second latch is called the slave. The master latch captures the input D when CLK is high and transfers it to the slave latch CLK goes low.

How to make a data flip-flop? ›

D Flip flops or data flip flops or delay flip flops can be designed using SR flip flops by connecting a not gate in between S and R inputs and tying them together. D flip flops can be used in place of SR flip flops where you need only SET and RESET state.

What is the rule of D flip-flop? ›

D-type flip-flop

For most of the time the output Q retains its current value (either 1 or 0). If we change the value of the input D, that does not affect the output. The only time the output can change is at the exact instant when Clk changes from 0 to 1. The output Q will then change to the value of D at that instant.

What is the logic of D flip-flop? ›

For example, a D-type flip-flop has an input data pin (D), a clock pin (CK), and an output data pin (Q). This flip-flop latches input data (D) on the rising edge of CK and transfers them to Q. Q remains unchanged till the next rising edge of CK regardless of the input data (D).

How do you calculate flip-flops? ›

each flip-flop = a bit. you need 1 bit from 0 to 1, 2 bit for 0 to 3 and so on. which means 2^n-1 = max number possible where n is the number of bits = number of flip-flops.

What are the disadvantages of D flip-flop? ›

Disadvantages of D flip flop :A delay flip flop in a circuit increases the circuit's size, often to about twice the normal. Additionally, they also make the circuits more complex.

What is the rule of flip-flop? ›

The flip-flop rule will be invoked in any game when there is a 10-run differential in favor of the visiting team at the start of the "open inning." If the visiting team is ahead by ten or more runs, the home team will remain at bat and start a new at-bats (beginning their seventh or last inning at-bats), meaning all ...

How many gates does a D flip-flop have? ›

The key components of a D Type Flip Flop circuit in digital logic design are the Data input (D), Clock input (CLK), an Inverter, and two NAND gates.

Why is the D flip-flop widely used? ›

D flip-flop is a better alternative that is very popular with digital electronics. They are commonly used for counters, shift registers, and input synchronization. In the D flip-flops, the output can only be changed at the clock edge, and if the input changes at other times, the output will be unaffected.

Why is d flip-flop called delay? ›

The working of D flip flop is similar to the D latch except that the output of D Flip Flop takes the state of the D input at the moment of a positive edge at the clock pin (or negative edge if the clock input is active low) and delays it by one clock cycle. That's why, it is commonly known as a delay flip flop.

Why is a D flip-flop called a transparent latch? ›

It is also known as transparent latch, data latch, or simply gated latch. It has a data input and an enable signal (sometimes named clock, or control). The word transparent comes from the fact that, when the enable input is on, the signal propagates directly through the circuit, from the input D to the output Q.

What is a toggle flip-flop? ›

T Flip-Flop is a single input logic circuit that holds or toggles its output according to the input state. Toggling means changing the next state output to complement the current state. T is an abbreviation for Toggle. A good example to explain this concept is using a light switch.

Is d flip-flop edge-triggered? ›

Whenever we enable a multivibrator circuit on the transitional edge of a square-wave enable signal, we call it a flip-flop instead of a latch. Consequently, and edge-triggered S-R circuit is more properly known as an S-R flip-flop, and an edge-triggered D circuit as a D flip-flop.

What is flip-flop short note? ›

Flip-Flop is popularly known as the basic digital memory circuit. It has two states as logic 1(High) and logic 0(low) states. A flip flop is a sequential circuit which consists of a single binary state of information or data. The digital circuit is a flip flop which has two outputs and are of opposite states.

What is the meaning of flipping flop? ›

: a sudden reversal (as of policy or strategy) 3. : a usually electronic device or a circuit (as in a computer) capable of assuming either of two stable states.

What is the difference between D flip-flop and SR flip-flop? ›

in D flip flop when the clock is enable , output is equal to the input D ie . if D=0 , output Q=0, and if D=1 ,Q=1. but in SR, depends on S and R value it will set , reset or unchanged the state of the latch.

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